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| CP1181 Product Brief OPTRANS Series CP1181_PB_Rev1.0 March, 2005 21 Channel E1/T1 Mapper www..com OVERVIEW The CP1181 is one of the OPTRANS series chips designed by Chiphomer Technology Limited. It is designed for add/drop multiplexer, terminal multiplexer, dual and single unidirectional ring applications. 21 E1/T1 signals are mapped to and from asynchronous TU12. The CP1181 interfaces to a byte-wide 19.44 MHz Telecom Bus. FEATURES Asynchronously mapping/de-mapping 21 E1 or T1 traffics into/from STM-1. T1 traffic mapping path is T1 VC11 TU12. TEBGA256 Configurable receive and transmit TU12 time-slots via microprocessor -40 ~ 85 Detects loss of input clock on Telecom Bus Interprets TU12 pointer according to G.783 (2000/10) and G.707 (2000/10) Detects LOM, TU-LOP and TU-AIS alarms Detects Remote Defect Indication (RDI), Remote Error Indication (REI), RFI alarm and Path Label Mismatch (PLM) alarm Provides 12-bit performance counters for BIP-2 errors and 11-bit performance counters for tributary REI errors Detects degraded signals(DEG) and Excessive Error defects (EXC) based on received BIP-2 errors. Extracts the 16-byte J2 sequence into microprocessor accessible registers, and checks the J2 sequence to detect TIM alarm Detects the K4 (bit5-bit7) and V5 bit8 for Enhanced Defect Indicator (E-RDI) Captures filtered K4 byte into microprocessor accessible registers Extracts V5 and K4 bytes into microprocessor accessible registers Extracts N2 byte and O bits into microprocessor accessible registers Receive Telecom Bus Interface RTCLKA RTPLA RTMFA RTJ0J1V1A RTDA[7:0] RTPARA RTINDA RTCLKB RTPLB RTMFB RTJ0J1V1B RTDB[7:0] RTPARB RTINDB TTCLKA TTPLA TTMFA TTJ0J1V1A TTDA[7:0] TTPARA TTINDA TTCLKB TTPLB TTJ0J1V1B TTMFB TTDB[7:0] TTPARB TTINDB DPLL Pointer Interpreter A POH Terminate A Mux Desync PRBS Analyzer Telecom Bus Loopback Pointer Interpreter B POH Terminate B Switching Control Line Loopback Mux Mux Path Internal Loopback E1_TDATA[0..20]/ T1_DATA[0..20] E1_TCLK[0..20]/ T1_TCLK[0..20] Mux Mux Transmit Telecom Bus Interface Pointer Generator A POH Build A Sync PRBS Generator E1_RDATA[0..20]/ T1_RDATA[0..20] E1_RCLK[0..20]/ T1_RCLK[0..20] Pointer Generator B POH Build B Microprocessor Interface DATA[15:0] ADD[12:0] WRN/RWS INT Copyright (c)2005 Chiphomer Technology Limited RDY/TAN MOTO CSN RDN/DSN Page 1 of 1 CP1181 Product Brief OPTRANS Series CP1181_PB_Rev1.0 March, 2005 21 Channel E1/T1 Mapper www..com Supports1+1 Path-protection Integrated bit-leaking circuit and DPLL The output jitter of E1/T1 data (either mapping jitter or combined jitter) is compliant with G.783 (2000/10) E1/T1 Port #0 to Port #7 can be configured to work in re-timing mode Supports the code-rate adjustment Optionally inserts VC-AIS and TU-AIS into upstream data Generates the TU12 pointer (V1, V2) per ITU G.783 The TU12 pointer value is fixed on 105 Calculates the BIP-2 and inserts into outgoing data stream, optionally inserts single or continued BIP-2 errors Inserts RDI/REI from either internal generation or microprocessor Inserts 16-byte programmable J2 sequence Inserts E-RDI from either internal generation or microprocessor Inserts programmable N2 byte and O bits Controlled High-Z output on transmit Telecom Bus Provides three bus timing modes for transmit Telecom Bus Build-in PRBS test function can be configured to any one of all 21 E1/T1 ports Provides 16-bit Intel/Motorola microprocessor interface 3.3V supply with 5V tolerant I/O IEEE 1149.1 JTAG boundary scan Maximum power less than 1.0 Watt Operating industrial temperature range: -40 ~ 85 PBGA256 package APPLICATIONS SDH Add/Drop Multiplexers SDH Terminal Multiplexers Multi-service Transport Platform (MSTP) TYPICAL APPLICATION Add Bus A Add Bus B Drop Bus A Drop Bus B 21ch E1/T1 Mapper CP1181 8ch 8ch LIU E1/T1 8ch LIU CH5008 LIU CH5008 CP5009 21 E1/T1 19.44MHz Telecom Bus Copyright (c)2005 Chiphomer Technology Limited Page 2 of 2 CP1181 Product Brief OPTRANS Series CP1181_PB_Rev1.0 March, 2005 21 Channel E1/T1 Mapper www..com RELATED PRODUCTS CH5008: CP5009: CP1122: CP1121: 8ch E1 LIU 8ch E1/T1/J1 LIU STM-1 Single Chip Add/Drop Multiplexer System device STM-1/4 Single Chip Add/Drop Multiplexer System device Chiphomer Technology Limited Add: 4F, Building D, 1618 Yishan Road, Shanghai, P.R.C. Tel: +86-(0)21-64058488, 64014543 Fax: +86-(0)21-64050030 Email: sales@chiphomer.com Web: www.chiphomer.com Copyright (c)2005 Chiphomer Technology Limited Page 3 of 3 |
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